Boosting Persistence Parallelism in Memory Bus and RDMA Network

Emerging non-volatile memories (NVMs) incorporate the features of fast byte-addressability and data persistence, which are beneficial for data services, such as file systems and databases. To support data persistence, a persistent memory system requires ordering for write requests. We observe that the memory bus and the Remote Direct Memory Access (RDMA) network are severely under-utilized during the process of ensuring data persistence, because the persistence parallelism in the memory bus and the RDMA network is not fully leveraged during ordering. To address this problem, we propose an architecture design to exploit the persistence parallelism in the memory bus and the RDMA network. First, we utilize inter-thread persistence parallelism for barrier epoch management with better bank level parallelism (BLP). Second, we enable intra-thread persistence parallelism with multiple barrier epochs inside one network packet, and propose a fine-grained memory persistence scheme through the network. With these features, our architecture is capable of efficiently supporting transaction-level persistence through RDMA network for file systems or NVM libraries. The experimental results show that our work can achieve 1.3× performance improvement for local applications and about 1.93× for remote applications serviced through the RDMA network.